FPGA/ASIC Design Engineer

US - AZ - Tempe, US - CA - Carlsbad, US - MA - Marlborough, US - MD - Germantown Ref #9195 16-Jun-2021

Job description

Bigger challenges. Bolder ideas. Global impact. At Viasat, we’re on a mission to deliver connections with the capacity to change the world. We’re the company behind the world’s fastest satellite internet service, with technology that’s helping to bridge the digital divide and improve life for our customers around the globe. By providing powerful new ways for people to connect with one another, gain greater access to education, entertainment, medical research, commerce, and much more, our team is empowering millions of customers worldwide.  

We’re looking for passionate, innovative professionals to join our team and connect the world to more. You’ll work in a collaborative and inclusive environment that values diverse perspectives and continuous learning, and provides industry-leading benefits with unmatched opportunities for career growth. Our team is fearless in the pursuit of new ideas and uncompromising in our quest to become the world’s first truly global Internet Service Provider. Interested in joining our mission? Take a look at career opportunities at Viasat today!

We are looking for a PL engineer to help with the design, verification, and implementation for both ASIC and FPGA developments.

Job Responsibilities
In this role, you will be working as part of a talented, multidisciplinary engineering team responsible for the coding, verification, and implementation of signal processing algorithms and system architectures in ASIC and FPGA.  The successful candidate will be expected to be highly organized, a creative thinker, an effective communicator.

2+ years’ experience implementing and verifying signal processing algorithms or system architectures in ASIC or FPGA technologies
BS or higher or higher in Electrical or Computer Engineering, Computer Science, Physical Sciences, or related technical field
Experience with Verilog or System Verilog for design 
Experience with System Verilog and UVM for design verification
Experience with standard ASIC and FPGA design tools (i.e., Synopsys, Cadence, Mentor, Intel/Altera, or Xilinx)
Experience with scripting tools and languages such as Make, Tcl, or Python
Must be a team player with a willingness to work across functional boundaries
Clear and concise communicator with the ability to inform and influence peers and managers
Up to 10% travel

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Additional Requirements and information

Minimum education:


Years of experience:

2-4 years


Up to 10%





Worker Classification:


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Viasat is proud to be an equal opportunity employer, seeking to create a welcoming and diverse environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, ancestry, physical or mental disability, medical condition, marital status, genetics, age, or veteran status or any other applicable legally protected status or characteristic.

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